Our 2-page position paper about building a CPU-free data processing unit (DPU) called Hyperion is accepted at Systems for Post-Moore Architectures (SPMA’22), https://sites.google.com/view/spma22eurosys/home (co-located with EuroSys’22).
This is work-in-progress in a close collaboration with Marco Spaziani Brunella (University of Rome Tor Vergata, Axbryd) and Marco Bonola (Axbryd). We are having tons of fun while discussing and building the Hyperion prototype which forces us to re-think the computing architecture without the CPU (consequently many headaches also ensue!) such as why FPGA, how to program such a DPU, what should be the application-interface, how to deploy in the cloud, how to design and build distributed applications?
Title: Hyperion: A Unified, Zero-CPU Data-Processing Unit
Authors: Marco Spaziani Brunella (University of Rome Tor Vergata, Axbryd), Marco Bonola (CNIT/Axbryd), Animesh Trivedi (VU, Amsterdam)
Abstract: Since the inception of computing, we have been reliant on CPU-powered architectures. However, today this reliance is challenged by manufacturing limitations (CMOS scaling), performance expectations (stalled clocks, Turing tax), and security concerns (microarchitectural attacks). To re-imagine our computing architecture, in this work we take a more radical but pragmatic approach and propose to integrate three primary pillars of computing, i.e., networking, storage, and computing, into a single CPU-free Data Processing Unit (DPU) called Hyperion. We present our vision to make the Hyperion DPU self-sufficient and self-hosting, hence not needing to attach it to any host server, thus making it a genuinely CPU-free DPU. We present our initial work-in-progress details and open challenges.
Acknowledgements: This work is generously supported by the NWO grant number OCENW.XS3.030, Project Zero: Imagining a Brave CPU-free World!, and the Xilinx University Donation Program (https://www.xilinx.com/support/university.html).